From e8d4f3548cd05bb2ef36e8a9bebccc756e482531 Mon Sep 17 00:00:00 2001 From: Jiahui Cao Date: Tue, 1 Sep 2026 06:27:43 +0000 Subject: [PATCH 1/4] perf(dsv4): bump MI355X 8k1k vLLM nightly MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update the fixed-sequence STP and MTP image pins to the 2026-09-01 ROCm nightly. Keep the existing AITER flags because the newly merged DSV4 optimizations auto-enable through that path. 中文：将 MI355X 固定序列 8k/1k 的 DSV4 STP 与 MTP 镜像更新到 2026-09-01 ROCm nightly。保留现有 AITER 标志，新合入的 DSV4 优化会通过该路径自动启用。 --- configs/amd-master.yaml | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/configs/amd-master.yaml b/configs/amd-master.yaml index 62daacca6..87804c792 100644 --- a/configs/amd-master.yaml +++ b/configs/amd-master.yaml @@ -1194,14 +1194,11 @@ dsv4-fp4-mi355x-sglang-mtp: # # DeepSeek-V4-Pro is FP4+FP8 mixed (FP4 MoE expert weights, FP8 for the # rest); InferenceX classifies this as fp4 — same as the sister sglang -# and atom DSv4 mi355x entries below. Image and serving flags follow the -# validated recipe from vllm-project/recipes#433: AITER+AITER_LINEAR, mp -# executor, triton_unfused MoE (required for the FP4 expert format), -# async scheduling, max-num-seqs=128, max-num-batched-tokens=8192, -# gpu-mem-util=0.6. TP8 sweeps conc 4-64; DEP8 has a single conc=64 -# probe to validate the ROCm DP+EP path. +# and atom DSv4 mi355x entries below. The serving recipe enables AITER +# explicitly; the pinned nightly then auto-selects its ROCm DeepSeek-V4 +# mHC, sparse-indexer, attention, and compressor-GEMM optimizations. dsv4-fp4-mi355x-vllm: - image: vllm/vllm-openai-rocm:nightly-09663abde0f50944a8d5ea30120666024b503faa + image: vllm/vllm-openai-rocm:nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb model: deepseek-ai/DeepSeek-V4-Pro model-prefix: dsv4 runner: mi355x @@ -1221,10 +1218,10 @@ dsv4-fp4-mi355x-vllm: # vllm-project/vllm#43385 (ROCm DeepSeek-V4 MTP, merged 2026-05-24, included in # v0.22.0). Full conc 4-512 range maps the complete crossover curve: MTP wins # at low batch (PR perf data: +75% @ conc1, +38% @ conc8) and falls behind STP -# above ~conc32 (-37% @ conc32). Image reuses the base entry's v0.22.0 ROCm -# build, which already contains the MTP commit. +# above ~conc32 (-37% @ conc32). Image reuses the base entry's pinned ROCm +# nightly, which includes the MTP path and subsequent DSV4 kernel updates. dsv4-fp4-mi355x-vllm-mtp: - image: vllm/vllm-openai-rocm:nightly-09663abde0f50944a8d5ea30120666024b503faa + image: vllm/vllm-openai-rocm:nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb model: deepseek-ai/DeepSeek-V4-Pro model-prefix: dsv4 runner: mi355x From db2fec6ef4639e33f14a20ca1d9b2aa1289ca65f Mon Sep 17 00:00:00 2001 From: Jiahui Cao Date: Tue, 1 Sep 2026 06:29:16 +0000 Subject: [PATCH 2/4] perf(dsv4): trigger MI355X 8k1k nightly sweep MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Append the fixed-sequence STP and MTP image update to the performance changelog for PR #2792. 中文：在性能变更日志末尾追加 PR #2792 的固定序列 STP/MTP 镜像升级条目，以触发基准测试扫描。 --- perf-changelog.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/perf-changelog.yaml b/perf-changelog.yaml index 2f58d1b44..d9848305b 100644 --- a/perf-changelog.yaml +++ b/perf-changelog.yaml @@ -6730,3 +6730,14 @@ - "Configure model-specific tool and reasoning parsers for the Kimi-K3 and MiniMax-M3 serving paths so opt-in verifier requests produce structured OpenAI tool calls." - "Limit shared AgentX readiness and synthetic-acceptance rewrites to eval-only runs so default throughput recipe rendering remains unchanged." pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2634 + +- config-keys: + - dsv4-fp4-mi355x-vllm + - dsv4-fp4-mi355x-vllm-mtp + scenario-type: + - fixed-seq-len + description: + - "Bump the DeepSeek-V4-Pro FP4 MI355X 8k/1k STP and MTP images from nightly-09663abde0f50944a8d5ea30120666024b503faa to the 2026-09-01 ROCm nightly nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb (digest sha256:f0bdaf5217a09949842b45c1ea1f12260d3205ec81f143b320dfc2eb3ec95e55)." + - "Pick up the latest automatic ROCm DeepSeek-V4 optimizations, including fused mHC post/pre plus RMSNorm, gfx950 C4A top-k dispatch, fused C4 compressor GEMMs, fused SWA q/kv RMSNorm plus q FP8 quantization, and medium-batch cooperative top-k tuning." + - "Keep the existing VLLM_ROCM_USE_AITER=1, VLLM_ROCM_USE_AITER_MOE=1, and --moe-backend aiter settings; no additional serving flag is required for these kernels." + pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2792 From 6a1fcee3f43434b8054378c02435d7a205240d8d Mon Sep 17 00:00:00 2001 From: Jiahui Cao Date: Tue, 1 Sep 2026 07:04:31 +0000 Subject: [PATCH 3/4] perf(dsv4): enable ROCm recipe flags MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add shared-expert fusion and INT4 quick-reduce environment variables to the MI355X 8k/1k STP and MTP paths, and document the explicit recipe settings.\n\n中文：为 MI355X 8k/1k 的 STP 与 MTP 路径加入 shared-expert fusion 和 INT4 quick-reduce 环境变量，并同步记录显式启用的配方设置。 --- .../single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm.sh | 4 ++++ .../single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm_mtp.sh | 4 ++++ configs/amd-master.yaml | 8 +++++--- perf-changelog.yaml | 2 +- 4 files changed, 14 insertions(+), 4 deletions(-) diff --git a/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm.sh b/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm.sh index e6f02db07..da6a21388 100755 --- a/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm.sh +++ b/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm.sh @@ -46,6 +46,10 @@ fi export VLLM_ROCM_USE_AITER=1 export VLLM_ROCM_USE_AITER_MOE=1 +# Keep the upstream ROCm recipe knobs explicit. The shared-expert fusion +# self-disables when this checkpoint's shared-expert path is not eligible. +export VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1 +export VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4 SERVER_LOG=/workspace/server.log diff --git a/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm_mtp.sh b/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm_mtp.sh index ce51f8c5d..e052b3a45 100755 --- a/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm_mtp.sh +++ b/benchmarks/single_node/fixed_seq_len/dsv4_fp4_mi355x_vllm_mtp.sh @@ -41,6 +41,10 @@ fi export VLLM_ROCM_USE_AITER=1 export VLLM_ROCM_USE_AITER_MOE=1 +# Keep the upstream ROCm recipe knobs explicit. The shared-expert fusion +# self-disables when this checkpoint's shared-expert path is not eligible. +export VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1 +export VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4 SERVER_LOG=/workspace/server.log PORT=${PORT:-8888} diff --git a/configs/amd-master.yaml b/configs/amd-master.yaml index 87804c792..17762d24a 100644 --- a/configs/amd-master.yaml +++ b/configs/amd-master.yaml @@ -1194,9 +1194,11 @@ dsv4-fp4-mi355x-sglang-mtp: # # DeepSeek-V4-Pro is FP4+FP8 mixed (FP4 MoE expert weights, FP8 for the # rest); InferenceX classifies this as fp4 — same as the sister sglang -# and atom DSv4 mi355x entries below. The serving recipe enables AITER -# explicitly; the pinned nightly then auto-selects its ROCm DeepSeek-V4 -# mHC, sparse-indexer, attention, and compressor-GEMM optimizations. +# and atom DSv4 mi355x entries below. The serving recipe enables AITER, +# shared-expert fusion, and INT4 quick-reduce explicitly; the pinned nightly +# then auto-selects its ROCm DeepSeek-V4 mHC, sparse-indexer, attention, and +# compressor-GEMM optimizations. Shared-expert fusion self-disables when the +# checkpoint path is not eligible. dsv4-fp4-mi355x-vllm: image: vllm/vllm-openai-rocm:nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb model: deepseek-ai/DeepSeek-V4-Pro diff --git a/perf-changelog.yaml b/perf-changelog.yaml index d9848305b..f26906db0 100644 --- a/perf-changelog.yaml +++ b/perf-changelog.yaml @@ -6739,5 +6739,5 @@ description: - "Bump the DeepSeek-V4-Pro FP4 MI355X 8k/1k STP and MTP images from nightly-09663abde0f50944a8d5ea30120666024b503faa to the 2026-09-01 ROCm nightly nightly-7c5dc571cbd1064ecc8a9b1045637ff647aa22cb (digest sha256:f0bdaf5217a09949842b45c1ea1f12260d3205ec81f143b320dfc2eb3ec95e55)." - "Pick up the latest automatic ROCm DeepSeek-V4 optimizations, including fused mHC post/pre plus RMSNorm, gfx950 C4A top-k dispatch, fused C4 compressor GEMMs, fused SWA q/kv RMSNorm plus q FP8 quantization, and medium-batch cooperative top-k tuning." - - "Keep the existing VLLM_ROCM_USE_AITER=1, VLLM_ROCM_USE_AITER_MOE=1, and --moe-backend aiter settings; no additional serving flag is required for these kernels." + - "Keep the existing VLLM_ROCM_USE_AITER=1, VLLM_ROCM_USE_AITER_MOE=1, and --moe-backend aiter settings, and explicitly add VLLM_ROCM_USE_AITER_FUSION_SHARED_EXPERTS=1 plus VLLM_ROCM_QUICK_REDUCE_QUANTIZATION=INT4 to both STP and MTP paths. The current checkpoint's shared-expert path does not satisfy the latest vLLM fusion conditions, so that fusion flag self-disables while preserving recipe parity." pr-link: https://github.com/SemiAnalysisAI/InferenceX/pull/2792 From 77dd5abfc4693f8747f81df821d8d8fb7095cce6 Mon Sep 17 00:00:00 2001 From: Jiahui Cao Date: Wed, 2 Sep 2026 20:51:58 +0000 Subject: [PATCH 4/4] chore: skip redundant sweep [skip-sweep] MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reuse the completed full sweep after synchronizing the PR with main. 中文：PR 与 main 同步后复用已完成的完整扫描，跳过重复扫描。