From 7afb5df73df0f00db64ba6a263ba6c5621e5d98f Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 16 Jul 2024 22:14:58 +0800 Subject: [PATCH 1/3] cpu/hotplug: Make HOTPLUG_PARALLEL independent of HOTPLUG_SMT mainline inclusion from mainline-6.11-rc1 commit c0e81a455e23f77683178b8ae32651df5841f065 category: feature bugzilla: https://github.com/RVCK-Project/rvck/issues/292 -------------------------------- Provide stub functions for SMT related parallel bring up functions so that HOTPLUG_PARALLEL can work without HOTPLUG_SMT. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/20240716-loongarch-hotplug-v3-1-af59b3bb35c8@flygoat.com Signed-off-by: Gao Rui --- kernel/cpu.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/kernel/cpu.c b/kernel/cpu.c index 7ab11b4597684..983cf9ed9ff90 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -1846,6 +1846,7 @@ static int __init parallel_bringup_parse_param(char *arg) } early_param("cpuhp.parallel", parallel_bringup_parse_param); +#ifdef CONFIG_HOTPLUG_SMT static inline bool cpuhp_smt_aware(void) { return cpu_smt_max_threads > 1; @@ -1855,6 +1856,16 @@ static inline const struct cpumask *cpuhp_get_primary_thread_mask(void) { return cpu_primary_thread_mask; } +#else +static inline bool cpuhp_smt_aware(void) +{ + return false; +} +static inline const struct cpumask *cpuhp_get_primary_thread_mask(void) +{ + return cpu_none_mask; +} +#endif /* * On architectures which have enabled parallel bringup this invokes all BP From ef5a9a215b1a376da1233107ec01fd79eaa2ca23 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 16 Jul 2024 22:14:59 +0800 Subject: [PATCH 2/3] cpu/hotplug: Provide weak fallback for arch_cpuhp_init_parallel_bringup() mainline inclusion from mainline-6.11-rc2 commit 2dce993165088dbe728faa21547e3b74213b6732 category: feature bugzilla: https://github.com/RVCK-Project/rvck/issues/292 -------------------------------- CONFIG_HOTPLUG_PARALLEL expects the architecture to implement arch_cpuhp_init_parallel_bringup() to decide whether paralllel hotplug is possible and to do the necessary architecture specific initialization. There are architectures which can enable it unconditionally and do not require architecture specific initialization. Provide a weak fallback for arch_cpuhp_init_parallel_bringup() so that such architectures are not forced to implement empty stub functions. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/all/20240716-loongarch-hotplug-v3-2-af59b3bb35c8@flygoat.com Signed-off-by: Gao Rui --- kernel/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/kernel/cpu.c b/kernel/cpu.c index 983cf9ed9ff90..b12bd20b2c53a 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -1867,6 +1867,11 @@ static inline const struct cpumask *cpuhp_get_primary_thread_mask(void) } #endif +bool __weak arch_cpuhp_init_parallel_bringup(void) +{ + return true; +} + /* * On architectures which have enabled parallel bringup this invokes all BP * prepare states for each of the to be onlined APs first. The last state From 706b693b756b1211bcf4b32a8ad8e2bb6d89ef38 Mon Sep 17 00:00:00 2001 From: Anup Patel Date: Mon, 17 Nov 2025 21:19:10 -0700 Subject: [PATCH 3/3] RISC-V: Enable HOTPLUG_PARALLEL for secondary CPUs mainline inclusion from mainline-6.18-rc7 commit 231fb999a9acd17b1335e79f0fd6fc627353a6bc category: feature bugzilla: https://github.com/RVCK-Project/rvck/issues/292 -------------------------------- The core kernel already supports parallel bringup of secondary CPUs (aka HOTPLUG_PARALLEL). The x86 and MIPS architectures already use HOTPLUG_PARALLEL and ARM is also moving toward it. On RISC-V, there is no arch specific global data accessed in the RISC-V secondary CPU bringup path so enabling HOTPLUG_PARALLEL for RISC-V would only require: 1) Providing RISC-V specific arch_cpuhp_kick_ap_alive() 2) Calling cpuhp_ap_sync_alive() from smp_callin() This patch is tested natively with OpenSBI on QEMU RV64 virt machine with 64 cores and also tested with KVM RISC-V guest with 32 VCPUs. Signed-off-by: Anup Patel Reviewed-by: Atish Patra Link: https://patch.msgid.link/20250905122512.71684-1-apatel@ventanamicro.com Signed-off-by: Paul Walmsley Signed-off-by: Gao Rui --- arch/riscv/Kconfig | 2 +- arch/riscv/kernel/smpboot.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index b22d5b3907460..b7c75a64afc82 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -162,7 +162,7 @@ config RISCV select HAVE_RSEQ select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS - select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU + select HOTPLUG_PARALLEL if HOTPLUG_CPU select IRQ_DOMAIN select IRQ_FORCED_THREADING select KASAN_VMALLOC if KASAN diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index b3f18580f2f82..e6827fc77f808 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -40,7 +40,9 @@ #include "head.h" +#ifndef CONFIG_HOTPLUG_PARALLEL static DECLARE_COMPLETION(cpu_running); +#endif void __init smp_prepare_boot_cpu(void) { @@ -202,6 +204,12 @@ static int start_secondary_cpu(int cpu, struct task_struct *tidle) return -EOPNOTSUPP; } +#ifdef CONFIG_HOTPLUG_PARALLEL +int arch_cpuhp_kick_ap_alive(unsigned int cpu, struct task_struct *tidle) +{ + return start_secondary_cpu(cpu, tidle); +} +#else int __cpu_up(unsigned int cpu, struct task_struct *tidle) { int ret = 0; @@ -222,6 +230,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle) return ret; } +#endif void __init smp_cpus_done(unsigned int max_cpus) { @@ -239,6 +248,10 @@ asmlinkage __visible void smp_callin(void) mmgrab(mm); current->active_mm = mm; +#ifdef CONFIG_HOTPLUG_PARALLEL + cpuhp_ap_sync_alive(); +#endif + store_cpu_topology(curr_cpuid); notify_cpu_starting(curr_cpuid); @@ -257,7 +270,9 @@ asmlinkage __visible void smp_callin(void) * a local TLB flush right now just in case. */ local_flush_tlb_all(); +#ifndef CONFIG_HOTPLUG_PARALLEL complete(&cpu_running); +#endif /* * Disable preemption before enabling interrupts, so we don't try to * schedule a CPU that hasn't actually started yet.