Integrate patina_sre::SreBootManager into surface_patina_intel

[kat-perez]

Wire patina_sre::SreBootManager into the Intel Surface DXE-core binary so
the SRE flow ships on the lead Intel Surface board and sister boards in the
same generation.

Source repo: surface_patina_intel (Cargo workspace; entry
patina_bin/bin/patina_x64.rs). Currently registers only AdvancedLogger +
Performance — Surface is still on legacy EDK II BDS, no Patina boot
orchestration yet.

The lead-board FDF already embeds surface_patina_intel_x64.efi as the
[FV.PATINA] FV_IMAGE, so once the binary updates, the lead and sister
boards pick it up automatically via BLD_*_PATINA_BINARY_PATH. No per-board
FDF/DSC changes needed.

Status (2026-05-26)

• Hardware NVMe BP confirmed on the bench Intel Surface device: CAP.BPS=1,
  2× 1 GiB banks (Kioxia KBG8HZNS512G, NVMe 2.0). Verified via
  NvmeCapDump.efi (added under MsSurfaceIntelPkg/Application/NvmeCapDump/).
• Latest WinVOS WIM (ValidationOS.wim, 2026-05-26 drop) is 252 MiB — fits
  one bank with 772 MiB headroom.
• patina_sre crate now exists at
  odp-platform-common/uefi/crates/patina_sre/ (issue Add patina_sre crate (System Recovery Environment boot orchestrator) #91, skeleton ported
  from closed PR #1492). All 6 unit tests pass.

Steps

1. Add patina_sre and patina_boot as workspace deps in
   surface_patina_intel/Cargo.toml. Both are git-only today (neither is on
   the registry yet); pin to OpenDevicePartnership/odp-platform-common and
   OpenDevicePartnership/patina-components respectively. Also pin the
   patina git dep to feature/patina-boot to match both crates' transitive
   use of patina. Switch to version = "..." for all three once they
   publish.

2. Register the BDS architectural protocol in
   patina_bin/bin/patina_x64.rs's ComponentInfo::components impl:

   add.component(patina_boot::BootDispatcher::new(
       Arc::new(patina_sre::SreBootManager::new(boot_partition_path, main_os_path)),
   ));

   Boot partition + main OS device paths come from platform PCDs / config
   HOBs (likely via MsSurfaceCorePkg/Library/PeiPatinaConfigLib).

3. Bump surface_patina_intel/Cargo.toml and patina_bin/Cargo.toml
   versions so CI publishes a new Universal Package to the internal
   Intel-platform feed.

4. Smoke-test on the lead board by updating BLD_*_PATINA_BINARY_PATH to
   point at the new UPack and confirming the firmware boots.

Out of scope (follow-up sub-issues)

• Surface impl of HotkeySource trait (Add HotkeySource trait with keyboard and mock implementations #63) — MsButtonServicesHotkeySource
  consuming gMsButtonServicesProtocolGuid. Surface uses BootButtonsDxe
  (GPIO + SAM USP), not scancode interception.
• WIM RAM-disk boot integration (Boot SRE WIM from boot partition into RAM disk #51, Add EFI_RAM_DISK_PROTOCOL binding to patina SDK #65, Add partition file-read helper to patina-boot #66, Add install_ram_disk helper to patina-boot #67) once those merge.
• Capsule-update pre-boot hook (Apply SRE WIM capsule update to boot partition #52, Add partition raw-write helper to patina-boot #71, Add pre-boot hook slot to SreBootManager #72, Wire capsule processing into SreBootManager pre-boot hook #73) once merged.
• Boot-partition write-lock helper in patina_boot (Add partition write-lock helper to patina-boot #61) — SreBootManager
  currently stubs the lock call with a log::warn!; will swap to the real
  helper once Add partition write-lock helper to patina-boot #61 lands.

Depends on: #91 (patina_sre crate skeleton) — done as of 2026-05-26.

[kat-perez]

Orchestration layer verified end-to-end on Maa Intel Surface hardware.

Done:

• patina_boot + patina_sre workspace deps added to surface_patina_intel/Cargo.toml
• BootDispatcher::new(SreBootManager::new(...)) registered in patina_bin/bin/patina_x64.rs's ComponentInfo::components impl
• Legacy BdsDxe.inf removed from Msft900MaaPkg.fdf and MsSurfaceCoreCommon.dsc
• patina_bin/Cargo.toml bumped to 1.5.0-feature-1
• Hardware boot: Patina-native BDS owns the architectural protocol; bootmgfw.efi loads and Windows boots

What still depends on this issue:

• Step 2 originally specified the boot-partition + main-OS device paths come from platform PCDs/config HOBs (via PeiPatinaConfigLib). Current implementation uses placeholder DevicePathBuf values at registration time and relies on helpers::discover_boot_options finding the Boot#### entry at runtime. That works for the existing Boot####-configured platforms but needs the static PCD/HOB path wiring for production. Follow-up issue created for that work.

Feature branches:

• surface_patina_intel @ feature/sre-bootmanager-integration (ADO MSFTDEVICES/UEFI-Intel)
• Devices @ feature/sre-bootmanager-integration (ADO MSFTDEVICES/UEFI-Intel)