如果採用，此提交將刪除錯誤專案，並完成CH6-1 工作項目一

修改項目:

Author: timmy61109

CH6/CH6-1.qws

@@ -18,13 +18,13 @@
 #
 # Quartus II 32-bit
 # Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
-# Date created = 21:10:57  September 11, 2019
+# Date created = 23:05:27  September 30, 2019
 #
 # -------------------------------------------------------------------------- #
 
 QUARTUS_VERSION = "13.1"
-DATE = "21:10:57  September 11, 2019"
+DATE = "23:05:27  September 30, 2019"
 
 # Revisions
 
-PROJECT_REVISION = "CH6-1"
+PROJECT_REVISION = "Ten_line_to_four_line_BCD_encoder"

CH6/CH6-1/Ten_line_to_four_line_BCD_encoder.bdf

@@ -18,14 +18,14 @@
 #
 # Quartus II 32-bit
 # Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
-# Date created = 21:10:57  September 11, 2019
+# Date created = 23:05:27  September 30, 2019
 #
 # -------------------------------------------------------------------------- #
 #
 # Notes:
 #
 # 1) The default values for assignments are stored in the file:
-#		CH6-1_assignment_defaults.qdf
+#		Ten_line_to_four_line_BCD_encoder_assignment_defaults.qdf
 #    If this file doesn't exist, see file:
 #		assignment_defaults.qdf
 #
@@ -38,14 +38,35 @@
 
 set_global_assignment -name FAMILY "Cyclone III"
 set_global_assignment -name DEVICE EP3C16F484C6
-set_global_assignment -name TOP_LEVEL_ENTITY "CH6-1"
+set_global_assignment -name TOP_LEVEL_ENTITY Ten_line_to_four_line_BCD_encoder
 set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
-set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:10:57  SEPTEMBER 11, 2019"
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:05:27  SEPTEMBER 30, 2019"
 set_global_assignment -name LAST_QUARTUS_VERSION 13.1
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
 set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
 set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
-set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
+set_global_assignment -name BDF_FILE Ten_line_to_four_line_BCD_encoder.bdf
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+set_location_assignment PIN_C1 -to A
+set_location_assignment PIN_C2 -to B
+set_location_assignment PIN_B2 -to C
+set_location_assignment PIN_B1 -to D
+set_location_assignment PIN_D2 -to I0
+set_location_assignment PIN_E3 -to I2
+set_location_assignment PIN_H7 -to I3
+set_location_assignment PIN_J7 -to I4
+set_location_assignment PIN_G5 -to I5
+set_location_assignment PIN_G4 -to I6
+set_location_assignment PIN_H6 -to I7
+set_location_assignment PIN_H5 -to I8
+set_location_assignment PIN_J6 -to I9
+set_global_assignment -name CDF_FILE output_files/Chain1.cdf
+set_location_assignment PIN_E4 -to I1
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

CH6/CH6-1.qpf …-1/Ten_line_to_four_line_BCD_encoder.qpfCH6/CH6-1.qpf renamed to CH6/CH6-1/Ten_line_to_four_line_BCD_encoder.qpf CH6/CH6-1.qpf renamed to CH6/CH6-1/Ten_line_to_four_line_BCD_encoder.qpf

@@ -0,0 +1,6 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1569859978164 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1569859978166 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue Oct  1 00:12:57 2019 " "Processing started: Tue Oct  1 00:12:57 2019" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1569859978166 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1569859978166 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off Ten_line_to_four_line_BCD_encoder -c Ten_line_to_four_line_BCD_encoder " "Command: quartus_asm --read_settings_files=off --write_settings_files=off Ten_line_to_four_line_BCD_encoder -c Ten_line_to_four_line_BCD_encoder" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1569859978167 ""}
+{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" {  } {  } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1569859979878 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1569859979923 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "382 " "Peak virtual memory: 382 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1569859980480 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue Oct  1 00:13:00 2019 " "Processing ended: Tue Oct  1 00:13:00 2019" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1569859980480 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1569859980480 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1569859980480 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1569859980480 ""}