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如果採用，此提交將完成7-1
修改項目: 模組: 議題37
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‎Digital_Logic_Practice/CH7/CH7-1/RS_FF_NANd.vwf‎

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/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
11+
functions, and any output files from any of the foregoing
12+
(including device programming or simulation files), and any
13+
associated documentation or information are expressly subject
14+
to the terms and conditions of the Altera Program License
15+
Subscription Agreement, the Altera Quartus II License Agreement,
16+
the Altera MegaCore Function License Agreement, or other
17+
applicable license agreement, including, without limitation,
18+
that your use is for the sole purpose of programming logic
19+
devices manufactured by Altera and sold by Altera or its
20+
authorized distributors. Please refer to the applicable
21+
agreement for further details.
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*/
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HEADER
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{
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VERSION = 1;
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TIME_UNIT = ns;
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DATA_OFFSET = 0.0;
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DATA_DURATION = 1000.0;
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SIMULATION_TIME = 0.0;
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GRID_PHASE = 0.0;
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GRID_PERIOD = 10.0;
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GRID_DUTY_CYCLE = 50;
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}
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SIGNAL("CK")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
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SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
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LSB_INDEX = -1;
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DIRECTION = INPUT;
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PARENT = "";
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}
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SIGNAL("Q")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
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SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
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LSB_INDEX = -1;
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DIRECTION = OUTPUT;
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PARENT = "";
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}
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SIGNAL("Q_bar")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
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SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
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LSB_INDEX = -1;
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DIRECTION = OUTPUT;
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PARENT = "";
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}
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SIGNAL("R")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
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SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
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LSB_INDEX = -1;
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DIRECTION = INPUT;
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PARENT = "";
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}
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SIGNAL("S")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
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SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
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LSB_INDEX = -1;
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DIRECTION = INPUT;
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PARENT = "";
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}
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TRANSITION_LIST("CK")
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{
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NODE
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{
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REPEAT = 1;
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NODE
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{
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REPEAT = 500;
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LEVEL 0 FOR 1.0;
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LEVEL 1 FOR 1.0;
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}
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}
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}
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TRANSITION_LIST("Q")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL X FOR 1000.0;
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}
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}
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TRANSITION_LIST("Q_bar")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL X FOR 1000.0;
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}
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}
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TRANSITION_LIST("R")
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{
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NODE
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{
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REPEAT = 1;
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NODE
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{
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REPEAT = 5;
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LEVEL 0 FOR 100.0;
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LEVEL 1 FOR 100.0;
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}
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}
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}
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TRANSITION_LIST("S")
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{
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NODE
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{
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REPEAT = 1;
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NODE
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{
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REPEAT = 50;
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LEVEL 0 FOR 10.0;
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LEVEL 1 FOR 10.0;
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}
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}
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}
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DISPLAY_LINE
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{
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CHANNEL = "CK";
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EXPAND_STATUS = COLLAPSED;
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RADIX = Binary;
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TREE_INDEX = 0;
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TREE_LEVEL = 0;
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}
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DISPLAY_LINE
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{
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CHANNEL = "S";
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EXPAND_STATUS = COLLAPSED;
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RADIX = Binary;
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TREE_INDEX = 1;
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TREE_LEVEL = 0;
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}
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DISPLAY_LINE
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{
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CHANNEL = "R";
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EXPAND_STATUS = COLLAPSED;
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RADIX = Binary;
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TREE_INDEX = 2;
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TREE_LEVEL = 0;
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}
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DISPLAY_LINE
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{
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CHANNEL = "Q";
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EXPAND_STATUS = COLLAPSED;
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RADIX = Binary;
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TREE_INDEX = 3;
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TREE_LEVEL = 0;
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}
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DISPLAY_LINE
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{
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CHANNEL = "Q_bar";
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EXPAND_STATUS = COLLAPSED;
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RADIX = Binary;
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TREE_INDEX = 4;
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TREE_LEVEL = 0;
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}
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TIME_BAR
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{
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TIME = 0;
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MASTER = TRUE;
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}
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;

‎Digital_Logic_Practice/CH7/CH7-1/RS_FF_test.vwf‎

Lines changed: 181 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,181 @@
1+
/*
2+
WARNING: Do NOT edit the input and output ports in this file in a text
3+
editor if you plan to continue editing the block that represents it in
4+
the Block Editor! File corruption is VERY likely to occur.
5+
*/
6+
7+
/*
8+
Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
9+
Your use of Altera Corporation's design tools, logic functions
10+
and other software and tools, and its AMPP partner logic
11+
functions, and any output files from any of the foregoing
12+
(including device programming or simulation files), and any
13+
associated documentation or information are expressly subject
14+
to the terms and conditions of the Altera Program License
15+
Subscription Agreement, the Altera Quartus II License Agreement,
16+
the Altera MegaCore Function License Agreement, or other
17+
applicable license agreement, including, without limitation,
18+
that your use is for the sole purpose of programming logic
19+
devices manufactured by Altera and sold by Altera or its
20+
authorized distributors. Please refer to the applicable
21+
agreement for further details.
22+
*/
23+
24+
HEADER
25+
{
26+
VERSION = 1;
27+
TIME_UNIT = ns;
28+
DATA_OFFSET = 0.0;
29+
DATA_DURATION = 1000.0;
30+
SIMULATION_TIME = 0.0;
31+
GRID_PHASE = 0.0;
32+
GRID_PERIOD = 10.0;
33+
GRID_DUTY_CYCLE = 50;
34+
}
35+
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SIGNAL("CK")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
39+
SIGNAL_TYPE = SINGLE_BIT;
40+
WIDTH = 1;
41+
LSB_INDEX = -1;
42+
DIRECTION = INPUT;
43+
PARENT = "";
44+
}
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SIGNAL("Q")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
49+
SIGNAL_TYPE = SINGLE_BIT;
50+
WIDTH = 1;
51+
LSB_INDEX = -1;
52+
DIRECTION = OUTPUT;
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PARENT = "";
54+
}
55+
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SIGNAL("Q_bar")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
59+
SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
61+
LSB_INDEX = -1;
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DIRECTION = OUTPUT;
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PARENT = "";
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}
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SIGNAL("R")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
69+
SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
71+
LSB_INDEX = -1;
72+
DIRECTION = INPUT;
73+
PARENT = "";
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}
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SIGNAL("S")
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{
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VALUE_TYPE = NINE_LEVEL_BIT;
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SIGNAL_TYPE = SINGLE_BIT;
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WIDTH = 1;
81+
LSB_INDEX = -1;
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DIRECTION = INPUT;
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PARENT = "";
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}
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TRANSITION_LIST("CK")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL 0 FOR 1000.0;
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}
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}
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TRANSITION_LIST("Q")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL X FOR 1000.0;
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}
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}
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TRANSITION_LIST("Q_bar")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL X FOR 1000.0;
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}
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}
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TRANSITION_LIST("R")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL 0 FOR 1000.0;
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}
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}
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TRANSITION_LIST("S")
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{
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NODE
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{
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REPEAT = 1;
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LEVEL 0 FOR 1000.0;
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}
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}
130+
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DISPLAY_LINE
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{
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CHANNEL = "CK";
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EXPAND_STATUS = COLLAPSED;
135+
RADIX = Binary;
136+
TREE_INDEX = 0;
137+
TREE_LEVEL = 0;
138+
}
139+
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DISPLAY_LINE
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{
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CHANNEL = "Q";
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EXPAND_STATUS = COLLAPSED;
144+
RADIX = Binary;
145+
TREE_INDEX = 1;
146+
TREE_LEVEL = 0;
147+
}
148+
149+
DISPLAY_LINE
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{
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CHANNEL = "Q_bar";
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EXPAND_STATUS = COLLAPSED;
153+
RADIX = Binary;
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TREE_INDEX = 2;
155+
TREE_LEVEL = 0;
156+
}
157+
158+
DISPLAY_LINE
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{
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CHANNEL = "R";
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EXPAND_STATUS = COLLAPSED;
162+
RADIX = Binary;
163+
TREE_INDEX = 3;
164+
TREE_LEVEL = 0;
165+
}
166+
167+
DISPLAY_LINE
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{
169+
CHANNEL = "S";
170+
EXPAND_STATUS = COLLAPSED;
171+
RADIX = Binary;
172+
TREE_INDEX = 4;
173+
TREE_LEVEL = 0;
174+
}
175+
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TIME_BAR
177+
{
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TIME = 0;
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MASTER = TRUE;
180+
}
181+
;

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