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‎CH3/CH3-2/NAND_2.bdf‎

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/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 1991-2013 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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*/
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(header "graphic" (version "1.4"))
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(pin
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(input)
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(rect 144 216 312 232)
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(text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
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(text "A" (rect 5 0 14 10)(font "Arial" ))
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(pt 168 8)
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(drawing
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(line (pt 84 12)(pt 109 12))
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(line (pt 84 4)(pt 109 4))
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(line (pt 113 8)(pt 168 8))
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(line (pt 84 12)(pt 84 4))
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(line (pt 109 4)(pt 113 8))
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(line (pt 109 12)(pt 113 8))
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)
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(text "VCC" (rect 128 7 149 16)(font "Arial" (font_size 6)))
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)
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(pin
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(input)
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(rect 144 256 312 272)
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(text "INPUT" (rect 125 0 154 9)(font "Arial" (font_size 6)))
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(text "B" (rect 5 0 14 10)(font "Arial" ))
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(pt 168 8)
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(drawing
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(line (pt 84 12)(pt 109 12))
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(line (pt 84 4)(pt 109 4))
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(line (pt 113 8)(pt 168 8))
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(line (pt 84 12)(pt 84 4))
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(line (pt 109 4)(pt 113 8))
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(line (pt 109 12)(pt 113 8))
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)
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(text "VCC" (rect 128 7 149 16)(font "Arial" (font_size 6)))
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)
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(pin
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(output)
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(rect 440 232 616 248)
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(text "OUTPUT" (rect 1 0 41 9)(font "Arial" (font_size 6)))
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(text "F" (rect 90 0 98 10)(font "Arial" ))
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(pt 0 8)
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(drawing
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(line (pt 0 8)(pt 52 8))
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(line (pt 52 4)(pt 78 4))
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(line (pt 52 12)(pt 78 12))
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(line (pt 52 12)(pt 52 4))
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(line (pt 78 4)(pt 82 8))
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(line (pt 82 8)(pt 78 12))
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(line (pt 78 12)(pt 82 8))
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)
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)
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(symbol
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(rect 344 216 408 264)
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(text "NAND2" (rect 1 0 36 9)(font "Arial" (font_size 6)))
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(text "inst" (rect 3 37 20 47)(font "Arial" ))
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(port
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(pt 0 32)
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(input)
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(text "IN2" (rect 2 23 23 34)(font "Courier New" (bold))(invisible))
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(text "IN2" (rect 2 23 23 34)(font "Courier New" (bold))(invisible))
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(line (pt 0 32)(pt 15 32))
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)
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(port
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(pt 0 16)
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(input)
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(text "IN1" (rect 2 7 24 18)(font "Courier New" (bold))(invisible))
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(text "IN1" (rect 2 7 24 18)(font "Courier New" (bold))(invisible))
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(line (pt 0 16)(pt 15 16))
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)
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(port
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(pt 64 24)
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(output)
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(text "OUT" (rect 48 15 70 26)(font "Courier New" (bold))(invisible))
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(text "OUT" (rect 48 15 70 26)(font "Courier New" (bold))(invisible))
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(line (pt 52 24)(pt 64 24))
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)
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(drawing
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(line (pt 15 37)(pt 32 37))
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(line (pt 15 12)(pt 32 12))
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(line (pt 15 36)(pt 15 12))
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(arc (pt 32 36)(pt 32 12)(rect 20 12 45 37))
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(circle (rect 44 20 52 28))
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)
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)
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(connector
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(pt 344 232)
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(pt 336 232)
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)
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(connector
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(pt 336 232)
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(pt 336 224)
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)
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(connector
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(pt 336 224)
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(pt 312 224)
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)
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(connector
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(pt 344 248)
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(pt 312 248)
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)
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(connector
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(pt 408 240)
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(pt 440 240)
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)
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(connector
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(pt 312 248)
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(pt 312 264)
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)

‎CH3/CH3-2/NAND_2.qsf‎

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set_global_assignment -name FAMILY "Cyclone III"
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set_global_assignment -name DEVICE AUTO
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set_global_assignment -name DEVICE EP3C16F484C6
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set_global_assignment -name TOP_LEVEL_ENTITY NAND_2
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:46:28 JULY 30, 2019"
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set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
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set_global_assignment -name BDF_FILE NAND_2.bdf
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
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set_location_assignment PIN_D2 -to A
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set_location_assignment PIN_E4 -to B
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set_location_assignment PIN_B1 -to F
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

‎CH3/CH3-2/db/.cmp.kpt‎

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‎CH3/CH3-2/db/NAND_2.(0).cnf.cdb‎

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‎CH3/CH3-2/db/NAND_2.(0).cnf.hdb‎

556 Bytes
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‎CH3/CH3-2/db/NAND_2.asm.qmsg‎

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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1564532617363 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1564532617366 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jul 31 08:23:36 2019 " "Processing started: Wed Jul 31 08:23:36 2019" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1564532617366 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1564532617366 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off NAND_2 -c NAND_2 " "Command: quartus_asm --read_settings_files=off --write_settings_files=off NAND_2 -c NAND_2" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1564532617367 ""}
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{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1564532619302 ""}
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{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1564532619358 ""}
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{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "378 " "Peak virtual memory: 378 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1564532619963 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jul 31 08:23:39 2019 " "Processing ended: Wed Jul 31 08:23:39 2019" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1564532619963 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1564532619963 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1564532619963 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1564532619963 ""}

‎CH3/CH3-2/db/NAND_2.asm.rdb‎

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‎CH3/CH3-2/db/NAND_2.asm_labs.ddb‎

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‎CH3/CH3-2/db/NAND_2.cbx.xml‎

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<?xml version="1.0" ?>
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<LOG_ROOT>
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<PROJECT NAME="NAND_2">
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</PROJECT>
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</LOG_ROOT>

‎CH3/CH3-2/db/NAND_2.cmp.bpm‎

599 Bytes
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