如果採用，此提交將新增新的範例

修改項目:

新增第五章兩個範例。

vector跟op

vector做的是向量的存取，op做的是運算子的計算。

模組:

議題37

Author: timmy61109

VerilogHDL_Practice/CH5/op.v

@@ -0,0 +1,12 @@
+module op (A, B, Ci, Co, S, X, Y, Z);
+input [3:0] A, B;
+input Ci;
+output Co;
+output [3:0] S, X, Y, Z;
+
+assign {Co, S} = (A + B + Ci);
+assign X = {A[2:0], A[3]};
+assign Y = (B ~^ 4'b1010);
+assign Z = (~A) & B;
+
+endmodule // op

VerilogHDL_Practice/CH5/op_test.v

@@ -0,0 +1,30 @@
+module op_test ();
+
+reg [3:0] A, B;
+reg Ci = 1'b0;
+wire [3
+:0] Co, S, X, Y, Z;
+
+op UUT (.A(A), .B(B), .Ci(Ci), .Co(Co), .S(S), .X(X), .Y(Y), .Z(Z));
+
+initial begin
+  A = 4'b0000; B = 4'b0000; Ci = 1'b0;
+  #100; A = 4'b1100; B = 4'b1010; Ci = 1'b1;
+  #100; A = 4'b1001; B = 4'b0000; Ci = 1'b0;
+  #100; A = 4'b0001; B = 4'b1001; Ci = 1'b1;
+  #100; A = 4'b1110; B = 4'b0100; Ci = 1'b0;
+  #100; A = 4'b0111; B = 4'b0101; Ci = 1'b1;
+  #100; A = 4'b1000; B = 4'b1001; Ci = 1'b0;
+  #100; A = 4'b1010; B = 4'b0000; Ci = 1'b1;
+  #100; A = 4'b0011; B = 4'b0011; Ci = 1'b0;
+  #100; A = 4'b1111; B = 4'b1111; Ci = 1'b1;
+
+end
+
+initial begin
+  #1000;
+    $finish;
+
+end
+
+endmodule // op_test

VerilogHDL_Practice/CH5/vector.v

@@ -0,0 +1,17 @@
+module vector (A, B, W, X, Y, Z);
+
+input [3:0]A;
+input [4:0]B;
+output [2:0]W;
+output [4:0]X;
+output [2:0]Y;
+output [4:0]Z;
+
+assign W = (A);
+assign X = (A);
+assign Y = B[3:1];
+
+
+assign Z = {A[2:0], B[3:2]};
+
+endmodule // vector

VerilogHDL_Practice/CH5/vector_test.v

@@ -0,0 +1,33 @@
+`timescale 1ns / 1ps
+
+module vector_test ();
+
+reg [3:0] A;
+reg [4:0] B;
+wire [2:0] W;
+wire [4:0] X;
+wire [2:0] Y;
+wire [4:0] Z;
+
+
+vector UUT (.A(A), .B(B), .W(W), .X(X), .Y(Y), .Z(Z));
+
+initial begin
+  A = 4'b1111; B = 5'b11110;
+  #100 ;A = A >> 1; B = B >> 1;
+  #100 ;A = A >> 1; B = B >> 1;
+  #100 ;A = A >> 1; B = B >> 1;
+  #100 ;A = A >> 1; B = B >> 1;
+  #100 ;A = A >> 1; B = B >> 1;
+  #100 ;A = A >> 1; B = B >> 1;
+  #100 ;A = A >> 1; B = B >> 1;
+
+end
+
+initial begin
+  #800;
+    $finish;
+
+end
+
+endmodule // vector_test