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Add predefined project 1.0.2 (ECC hang bug fixed)
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project/Predefined/2Ch8Way-1.0.2/IPRepo-1.0.2/BCHSharedKESforTiger4/component.xml

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//////////////////////////////////////////////////////////////////////////////////
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// ChannelArbiter.v for Cosmos OpenSSD
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// Copyright (c) 2015 Hanyang University ENC Lab.
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// Contributed by Jinwoo Jeong <jwjeong@enc.hanyang.ac.kr>
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// Ilyong Jung <iyjung@enc.hanyang.ac.kr>
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// Yong Ho Song <yhsong@enc.hanyang.ac.kr>
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//
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// This file is part of Cosmos OpenSSD.
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//
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// Cosmos OpenSSD is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either version 3, or (at your option)
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// any later version.
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//
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// Cosmos OpenSSD is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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// See the GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Cosmos OpenSSD; see the file COPYING.
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// If not, see <http://www.gnu.org/licenses/>.
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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// Company: ENC Lab. <http://enc.hanyang.ac.kr>
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// Engineer: Jinwoo Jeong <jwjeong@enc.hanyang.ac.kr>
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// Ilyong Jung <iyjung@enc.hanyang.ac.kr>
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//
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// Project Name: Cosmos OpenSSD
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// Design Name: BCH Page Decoder
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// Module Name: ChannelArbiter
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// File Name: ChannelArbiter.v
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//
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// Version: v1.0.0
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//
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// Description: Channel selection according to priority for multiple connected
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// channels.
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//
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//////////////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////////////
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// Revision History:
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//
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// * v1.0.0
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// - first draft
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//////////////////////////////////////////////////////////////////////////////////
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`timescale 1ns / 1ps
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module ChannelArbiter
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(
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iClock ,
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iReset ,
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iRequestChannel ,
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iLastChunk ,
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oKESAvail ,
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oChannelNumber ,
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iKESAvail
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);
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input iClock ;
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input iReset ;
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input [3:0] iRequestChannel ;
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input [3:0] iLastChunk ;
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output [3:0] oKESAvail ;
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output [1:0] oChannelNumber ;
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input iKESAvail ;
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reg [3:0] rPriorityQ0 ;
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reg [3:0] rPriorityQ1 ;
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reg [3:0] rPriorityQ2 ;
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reg [3:0] rPriorityQ3 ;
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reg [3:0] rKESAvail ;
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reg [1:0] rChannelNumber ;
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localparam State_Idle = 5'b00001;
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localparam State_Select = 5'b00010;
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localparam State_Out = 5'b00100;
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localparam State_Dummy = 5'b01000;
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localparam State_Standby = 5'b10000;
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reg [4:0] rCurState ;
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reg [4:0] rNextState ;
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always @ (posedge iClock)
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if (iReset)
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rCurState <= State_Idle;
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else
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rCurState <= rNextState;
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always @ (*)
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case (rCurState)
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State_Idle:
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if (|iRequestChannel && iKESAvail)
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rNextState <= State_Select;
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else
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rNextState <= State_Idle;
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State_Select:
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rNextState <= State_Out;
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State_Out:
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rNextState <= State_Dummy;
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State_Dummy:
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rNextState <= (iLastChunk[rChannelNumber]) ? State_Idle : State_Standby;
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State_Standby:
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if (iKESAvail)
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rNextState <= State_Out;
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else
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rNextState <= State_Standby;
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default:
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rNextState <= State_Idle;
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endcase
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always @ (posedge iClock)
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if (iReset)
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begin
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rKESAvail <= 4'b0;
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rChannelNumber <= 2'b0;
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end
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else
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case (rNextState)
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State_Idle:
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begin
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rKESAvail <= 4'b0;
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rChannelNumber <= rChannelNumber;
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end
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State_Select:
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if (iRequestChannel & rPriorityQ0)
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begin
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rKESAvail <= rPriorityQ0;
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case (rPriorityQ0)
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4'b0001:
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rChannelNumber <= 2'b00;
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4'b0010:
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rChannelNumber <= 2'b01;
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4'b0100:
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rChannelNumber <= 2'b10;
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4'b1000:
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rChannelNumber <= 2'b11;
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default:
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rChannelNumber <= rChannelNumber;
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endcase
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end
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else if (iRequestChannel & rPriorityQ1)
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begin
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rKESAvail <= rPriorityQ1;
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case (rPriorityQ1)
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4'b0001:
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rChannelNumber <= 2'b00;
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4'b0010:
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rChannelNumber <= 2'b01;
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4'b0100:
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rChannelNumber <= 2'b10;
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4'b1000:
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rChannelNumber <= 2'b11;
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default:
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rChannelNumber <= rChannelNumber;
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endcase
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end
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else if (iRequestChannel & rPriorityQ2)
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begin
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rKESAvail <= rPriorityQ2;
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case (rPriorityQ2)
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4'b0001:
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rChannelNumber <= 2'b00;
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4'b0010:
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rChannelNumber <= 2'b01;
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4'b0100:
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rChannelNumber <= 2'b10;
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4'b1000:
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rChannelNumber <= 2'b11;
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default:
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rChannelNumber <= rChannelNumber;
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endcase
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end
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else if (iRequestChannel & rPriorityQ3)
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begin
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rKESAvail <= rPriorityQ3;
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case (rPriorityQ3)
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4'b0001:
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rChannelNumber <= 2'b00;
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4'b0010:
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rChannelNumber <= 2'b01;
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4'b0100:
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rChannelNumber <= 2'b10;
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4'b1000:
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rChannelNumber <= 2'b11;
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default:
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rChannelNumber <= rChannelNumber;
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endcase
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end
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default:
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begin
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rKESAvail <= rKESAvail;
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rChannelNumber <= rChannelNumber;
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end
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endcase
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always @ (posedge iClock)
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if (iReset)
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begin
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rPriorityQ0 <= 4'b0001;
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rPriorityQ1 <= 4'b0010;
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rPriorityQ2 <= 4'b0100;
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rPriorityQ3 <= 4'b1000;
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end
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else
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case (rNextState)
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State_Select:
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if (iRequestChannel & rPriorityQ0)
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begin
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rPriorityQ0 <= rPriorityQ1;
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rPriorityQ1 <= rPriorityQ2;
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rPriorityQ2 <= rPriorityQ3;
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rPriorityQ3 <= rPriorityQ0;
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end
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else if (iRequestChannel & rPriorityQ1)
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begin
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rPriorityQ1 <= rPriorityQ2;
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rPriorityQ2 <= rPriorityQ3;
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rPriorityQ3 <= rPriorityQ1;
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end
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else if (iRequestChannel & rPriorityQ2)
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begin
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rPriorityQ2 <= rPriorityQ3;
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rPriorityQ3 <= rPriorityQ2;
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end
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default:
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begin
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rPriorityQ0 <= rPriorityQ0;
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rPriorityQ1 <= rPriorityQ1;
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rPriorityQ2 <= rPriorityQ2;
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rPriorityQ3 <= rPriorityQ3;
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end
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endcase
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assign oKESAvail = (rCurState == State_Out) ? rKESAvail : 4'b0;
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assign oChannelNumber = rChannelNumber;
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endmodule

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