From 2dad280bd8e5e3ec679e3af28530ffabed16f8fb Mon Sep 17 00:00:00 2001 From: modolaty Date: Fri, 7 Aug 2026 19:00:06 -0500 Subject: [PATCH] arm64:dts: Add unknown device tree Add unknown device tree for unsupported Board IDs No LTPI GPIOs plain i2c bus for discovery, no devices under i2c bus the only devices are HPM and BMC FRUs tesetd: - in Kenya by removing Kenya Board ID Signed-off-by: modolaty --- arch/arm64/boot/dts/aspeed/Makefile | 1 + .../dts/aspeed/aspeed-bmc-amd-unknown.dts | 411 ++++++++++++++++++ 2 files changed, 412 insertions(+) create mode 100644 arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-unknown.dts diff --git a/arch/arm64/boot/dts/aspeed/Makefile b/arch/arm64/boot/dts/aspeed/Makefile index 1e86c998d54054..3c911e700dba37 100644 --- a/arch/arm64/boot/dts/aspeed/Makefile +++ b/arch/arm64/boot/dts/aspeed/Makefile @@ -1,5 +1,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ast2700-evb.dtb \ + aspeed-bmc-amd-unknown.dtb \ aspeed-bmc-amd-congo.dtb \ aspeed-bmc-amd-falcon.dtb \ aspeed-bmc-amd-eagle.dtb \ diff --git a/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-unknown.dts b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-unknown.dts new file mode 100644 index 00000000000000..383be774b34b3e --- /dev/null +++ b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-unknown.dts @@ -0,0 +1,411 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2026 AMD Inc. +// Author: Mohsen Dolaty + +/dts-v1/; + +#include "aspeed-g7.dtsi" +#include "dt-bindings/gpio/aspeed-gpio.h" +#include +#include + +#define PCIE0_EP 1 // 1: EP, 0: RC +#define PCIE1_EP 1 // 1: EP, 0: RC + +/ { + model = "AMD SP7"; + compatible = "amd,congo-bmc", "aspeed,ast2700"; + + chosen { + stdout-path = &uart12; + bootargs = "console=ttyS12,115200n8"; + }; + + firmware { + optee: optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + memory@400000000 { + device_type = "memory"; + reg = <0x4 0x00000000 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + #include "ast2700-reserved-mem.dtsi" + + video_engine_memory0: video0 { + size = <0x0 0x04000000>; + alignment = <0x0 0x00010000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + aliases { + }; +}; + +&mdio0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&pinctrl1 { + pinctrl_rgmii0_driving: rgmii0_driving { + pins = "C20", "C19", "A8", "R14", "A7", "P14", + "D20", "A6", "B6", "N14", "B7", "B8"; + drive-strength = <1>; + }; +}; + +&mac0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii0_default &pinctrl_rgmii0_driving>; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + clock-names = "MACCLK", "RCLK"; + phy-mode = "rmii"; + use-ncsi; +}; + +&fmc { + status = "okay"; + pinctrl-0 = <&pinctrl_fwspi_quad_default>; + pinctrl-names = "default"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; +#include "amd-flash-layout-128.dtsi" + }; + + flash@1 { + status = "okay"; + m25p,fast-read; + label = "mpflash"; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&spi0 { + status = "okay"; + pinctrl-0 = <&pinctrl_spi0_default &pinctrl_spi0_cs1_default>; + pinctrl-names = "default"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <33000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1_cs1_default>; + pinctrl-names = "default"; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <33000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +&spi2 { + status = "okay"; + pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2_cs1_default>; + pinctrl-names = "default"; + compatible = "aspeed,ast2700-spi-txrx"; + flash@0 { + reg = <0>; + status = "disabled"; + m25p,fast-read; + label = "pnor"; + compatible = "jedec,spi-nor"; + spi-max-frequency = <33000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + oled@0 { + reg = < 0 >; // Chip select 0 + compatible = "ssd,ssd1322"; + spi-max-frequency = <1000000>; // Adjust the frequency as needed + label = "ssd1322"; + status = "okay"; // Enable the SSD1322 device + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +//BMC Console +&uart12 { + status = "okay"; +}; + +&i2c0 { + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +}; + +&i2c1 { + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +}; + +&i2c7 { + status = "okay"; + clock-frequency = <400000>; + scmeeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; +}; + +&i2c8 { + status = "okay"; + clock-frequency = <400000>; + + hpmeeprom@50 { + compatible = "microchip,24lc256","atmel,24c256"; + reg = <0x50>; + }; +}; + +&i2c9 { + status = "okay"; + clock-frequency = <400000>; +}; + + +&i2c12 { + status = "okay"; + clock-frequency = <400000>; +}; + +&i2c13 { + status = "okay"; + clock-frequency = <400000>; +}; + +#define JESD300_SPD_I3C_MODE(bus, index, addr) \ +spd_ ## bus ## _ ## index: spd@addr,4cc5118 ## index ## 000 { \ + reg = <0x ## addr 0x4cc 0x5118 ## index ## 000>; \ + assigned-address = <0x ## addr>; \ + dcr = /bits/ 8 <0xda>; \ + bcr = /bits/ 8 <0x6>; \ +} + +#define JESD300_SPD_I2C_MODE(bus, index, addr) \ +spd_ ## bus ## _ ## index: spd@addr{ \ + reg = <0x ## addr 0x0 0x40>; \ + compatible = "eeprom"; \ +} + +#define JESD300_PMIC_I2C_MODE(bus, index, addr) \ +pmic_ ## bus ## _ ## index: pmic@addr{ \ + reg = <0x ## addr 0x0 0x40>; \ + compatible = "eeprom"; \ +} + +&i3c2 { + status = "okay"; + initial-role = "primary"; + bus-context = /bits/ 8 ; + internal-pullup = <2>; + i3c-scl-hz = <1000000>; + i2c-scl-hz = <100000>; + + i3c_hub0: i3chub0@70 { + reg = <0x70 0x0 0x40>; + compatible = "none"; + }; + + i3c_hub1: i3chub1@71 { + reg = <0x71 0x0 0x40>; + compatible = "none"; + }; + + JESD300_SPD_I2C_MODE(0, 0, 50); + JESD300_SPD_I2C_MODE(0, 1, 51); + JESD300_SPD_I2C_MODE(0, 2, 52); + JESD300_SPD_I2C_MODE(0, 3, 53); + JESD300_SPD_I2C_MODE(0, 4, 54); + JESD300_SPD_I2C_MODE(0, 5, 55); + JESD300_SPD_I2C_MODE(0, 6, 56); + JESD300_SPD_I2C_MODE(0, 7, 57); + + JESD300_PMIC_I2C_MODE(0, 0, 48); + JESD300_PMIC_I2C_MODE(0, 1, 49); + JESD300_PMIC_I2C_MODE(0, 2, 4a); + JESD300_PMIC_I2C_MODE(0, 3, 4b); + JESD300_PMIC_I2C_MODE(0, 4, 4c); + JESD300_PMIC_I2C_MODE(0, 5, 4d); + JESD300_PMIC_I2C_MODE(0, 6, 4e); + JESD300_PMIC_I2C_MODE(0, 7, 4f); +}; + +&gpio0 { + status = "okay"; + + /* + * by default the direction of the SEL_P0_SEC_I2C_ROT_BMC (GPIO B0) + * is "in". It should be set to "out" and value of "1" for the + * I2C bus to be owned by the BMC. + */ + p0_sec_i2c { + gpio-hog; + gpios = <8 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "SEL_P0_SEC_I2C_ROT_BMC"; + }; + + espi_default { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "espiboot_pin_default"; + }; + +}; + +<pi0 { + status = "okay"; +}; + +&video0 { + status = "okay"; + memory-region = <&video_engine_memory0>; +}; + +&espi0 { + status = "okay"; + perif-dma-mode; + perif-mmbi-enable; + perif-mmbi-src-addr = <0x0 0xa8000000>; + perif-mmbi-tgt-memory = <&espi0_mmbi_memory>; + perif-mmbi-instance-num = <0x1>; + perif-mcyc-enable; + perif-mcyc-src-addr = <0x0 0x98000000>; + perif-mcyc-size = <0x0 0x10000>; + oob-dma-mode; + flash-dma-mode; + flash-edaf-mode = <0>; + flash-edaf-tgt-addr = <&edaf0>; + flash-edaf-size = <0x0 0x2000000>; +}; + +&lpc0_pcc { + pcc-ports = <0x80>; + status = "okay"; +}; + +&uart9 { + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +}; + +&uart13 { + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +}; + +/* eSPI VUART */ +&vuart0 { + status = "okay"; + virtual; + port = <0x3f8>; + sirq = <4>; + sirq-polarity = <0>; +}; + +&uphy2a { + status = "okay"; +}; + +&uphy3a { + status = "okay"; +}; + +&vhuba1 { + status = "okay"; +}; + +&vhuba0 { + status = "okay"; + pinctrl-0 = <&pinctrl_usb2ahpd0_default>; +}; + +&xdma0 { + status = "okay"; + memory-region = <&xdma_memory0>; +}; + +&lpc0_kcs2 { + status = "okay"; + kcs-io-addr = <0xca2>; + kcs-channel = <2>; +}; + +&jtag1 { + status = "okay"; +}; + +&mctp0 { + status = "okay"; + memory-region = <&mctp0_reserved>; + mctp-controller; +}; + +&bmc_dev0 { + status = "okay"; + memory-region = <&bmc_dev0_memory>; +}; + +&emmc_controller { + status = "okay"; + mmc-hs200-1_8v; +}; + +&emmc { + status = "okay"; + bus-width = <4>; + pinctrl-0 = <&pinctrl_emmc_default>; + non-removable; + max-frequency = <200000000>; +};